1. Field of the Invention
The present invention relates generally to a method for converting an address in a semiconductor memory device and an apparatus therefor, and in particular to a method for converting an address in a semiconductor memory device and an apparatus therefor which can sequentially perform a data write operation on addresses from an upper address, by performing a write or read operation after converting inputted logical addresses into physical addresses in a memory device by using an address converting table.
2. Description of the Background Art
FIG. 1 is a structure diagram illustrating a conventional semiconductor memory device including: an address decoder unit 1 for externally receiving a control signal CTL and an address signal ADD_ext; and a plurality of memory block units M0-Mn for reading or writing data from/on a selected memory cell according to the output signal from the address decoder unit 1.
In the conventional structure of FIG. 1, the address ADD_ext externally inputted to the memory is an actual physical address of the memory. Accordingly, when the data written from the most significant address is invalidated (erased, namely the data are not erased from the memory, but the data of the used memory region are classified into valid ones, and thus new data can be overwritten), an empty space exists between the valid data as shown in FIG. 2a. Here, a process for writing new data and invalidating the data is repeated to separately store data of the memory in a few memory blocks from the most significant address to the least significant address.
As depicted in FIG. 3, when a data to be newly written is greater than the empty space between the data blocks, the new data is written in the empty space of the lower address. In the memory region, only small regions for storing small data are empty due to the repeated process for writing and invalidating the data.
In order to use such small spaces, when writing new data, a software or memory controller for operating the memory must separate one data block into a few strips and store the data in the divided strips, or re-store the data previously stored in the memory together to obtain a space and store the new data in the obtained space.
However, in the conventional semiconductor memory device, when the software or memory controller divides one data block into a few strips to write the new data, a data dividing structure is further required. As a result, the whole system requires complicated processing and operation speed is reduced. On the other hand, when the software or memory controller re-stores the previously-stored data together to obtain a space and stores the new data in the resulting xe2x80x9cfreexe2x80x9d space, operation speed is decreased.
Accordingly, it is a primary object of the present invention to provide a method of converting an address in a semiconductor memory device and an apparatus therefor which can improve system speed and reduce power consumption, by performing a write or read operation on a memory after converting externally-inputted logical addresses into physical addresses through an address converting table of an address input terminal, namely by enabling a software operating the memory to finish the data storing operation merely by making the memory renew the address converting table, and by accessing the memory with the physical addresses, instead of the logical addresses.
Another object of the present invention is to provide a method for converting an address in a semiconductor memory device and an apparatus therefor, which can efficiently manage power consumption, by aligning data stored in a memory in an upper memory, and intercepting the power of non-used memory blocks.
In order to achieve the above-described objects of the invention, there is provided a method of converting an address in a semiconductor memory device having an address converting table for converting logical addresses into physical addresses, including: a write operation step for converting inputted logical addresses into physical addresses in the address converting table, sequentially storing data in the converted physical addresses from an upper address, and storing the logical addresses and the physical addresses in the table to be equalized; an invalid data erasing step for receiving a logical address of an invalid data, and erasing the logical address from the address converting table; a read operation step for converting the inputted logical addresses into the physical addresses stored in a write operation in the address converting table, and reading data; and a logical address re-allocation step for re-allocating the logical addresses to obtain a memory space in a software using a memory, loading a re-allocated address map to the address converting table after re-allocating the logical addresses, and renewing the table.
In one aspect of the present invention, in the step for converting the logical addresses into the physical addresses, a most significant address usable in the memory is allocated in the write operation, the physical address converting result is stored in the address converting table, and the physical address converted in the write operation is detected and outputted from the table in regard to the logical address inputted in the read operation.
In another aspect of the present invention, the method for converting the address in the semiconductor memory device further includes a power control step for discriminating between a using or non-using state of the memory blocks according to the physical address information from the address converting table, and for applying or intercepting power according to the discrimination result so as to reduce power consumption.
In still another aspect of the present invention, the method for converting the address in the semiconductor memory device further includes a power control step for discriminating between a using or non-using state of the memory blocks by employing a register notifying data existence or absence in the respective memory blocks, and for applying or intercepting power according to the discrimination result so as to reduce power consumption.
There is also provided an apparatus for converting an address in a semiconductor memory device, including: an address converting unit for receiving a logical address indicating a write address, an invalid logical address indicating an address having an invalid data in a logical memory, an address renewing signal notifying renewal of a changed address map between the logical memory and a physical memory, and an address map signal updated to the physical memory, converting the received logical addresses into physical addresses, sequentially storing data in the converted physical addresses from a most significant physical address which can input data, storing the logical addresses and the physical addresses to be equalized, erasing invalid data of the logical address according to the invalid logical address, and converting the logical addresses received in a read operation into the physical addresses stored in a write operation to perform a data read operation.
In one aspect of the present invention, the address converting unit re-allocates the logical addresses, loads a re-allocated address map to the address converting table after re-allocating the logical addresses, and renews the table.
In another aspect of the present invention, the apparatus for converting the address in the semiconductor memory device further includes: a power control unit for discriminating a using or non-using state of memory blocks according to the physical address information from the address converting table, and for applying or intercepting power according to the discrimination result to reduce power consumption.
In addition, there is provided an apparatus for converting an address in a semiconductor memory device, including: an address converting unit for receiving a logical address indicating a write address, an invalid logical address indicating an address having an invalid data in a logical memory, an address renewing signal notifying renewal of a changed address map between the logical memory and a physical memory, and an address map signal updated to the physical memory, converting the received logical addresses into physical addresses, sequentially storing data in the converted physical addresses from a most significant physical address which can input data, storing the logical addresses and the physical addresses to be equalized, erasing invalid data of the logical address according to the invalid logical address, and converting the logical addresses received in a read operation into the physical addresses stored in a write operation to perform a data read operation; an address decoder unit for receiving the physical addresses from the address converting unit and an external control signal, and generating a decoded signal; and a plurality of memory block units for reading or writing data from/on a selected memory cell according to the signal from the address decoder unit.